Vijaykumar K Satpute, Developer in Bengaluru, Karnataka, India
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Vijaykumar K Satpute

Verified Expert  in Engineering

FPGA Engineer and Developer

Bengaluru, Karnataka, India

Toptal member since November 26, 2024

Expertise
VHDLMathematicsWindows DevelopmentMATLABFPGA
Bio

Vijaykumar is a skilled embedded design and development engineer with 7+ years of experience, including 3+ years in FPGA development and optimization. He has a strong track record in aerospace and defense, having developed a line-replaceable unit for Indian Air Force aircraft. His expertise includes compliance with industry standards like DO-178 and AS9001. Vijaykumar's skills in VHDL and FPGA design make him a valuable asset in creating innovative and reliable embedded solutions.

Portfolio

ComAvia Systems Technologies Pvt
VHDL, Xilinx Ise, STM32CubeIDE, ModelSim, OrCAD
GL Communications
VHDL, Xilinx Ise, Xilinx Vivado, ModelSim, FPGA

Experience

  • Mathematics - 10 years
  • Science - 10 years
  • VHDL - 8 years
  • Xilinx Ise - 5 years
  • Physics - 5 years
  • Xilinx Vivado - 5 years
  • OrCAD - 4 years
  • Tina - 2 years

Availability

Full-time

Preferred Environment

Windows

The most amazing...

...thing I've developed is a line-replaceable unit for Indian Air Force aircraft and helicopters.

Work Experience

R&D Engineer

2023 - PRESENT
ComAvia Systems Technologies Pvt
  • Developed an FPGA-based head-up display (HUD) simulator, an embedded solution unit for Indian fighter aircraft, displaying signals on a VGA monitor at 1280 x 1024 resolution and 60 hertz.
  • Designed a collective pitch indication (CPI) display unit with an AMLCD that simulates the analog display of a CPI and includes a redundant 7-segment display.
  • Implemented ARINC 429 in VHDL, which involved designing a digital circuit that adheres to the protocol's specifications, including data encoding, bit timing, and error detection.
  • Built ARINC 818 modules for video frame generation, encoding, decoding, and synchronization, ensuring we met data integrity and timing requirements.
Technologies: VHDL, Xilinx Ise, STM32CubeIDE, ModelSim, OrCAD

FPGA Design & Development Engineer

2022 - 2023
GL Communications
  • Designed and implemented packet processing logic, including frame formatting.
  • Managed Ethernet frames, VLAN tagging, and checksum calculations within the FPGA.
  • Ensured compliance with DO-254, DO-178B, and DO-160 standards in design, development, and testing.
Technologies: VHDL, Xilinx Ise, Xilinx Vivado, ModelSim, FPGA

Experience

CPI Display Unit

The CPI display unit is a domestically developed alternative to the imported versions used in Cheetah, Chetak, and Cheetal helicopters. This unit features an AMLCD that simulates the image of an analog display for the CPI. It also includes a redundant 7-segment display, which operates on the helicopter's battery voltage, ensuring functionality even without the 28-volt main power supply. Design, development, and testing complied with DO-254, DO-178B, and DO-160 standards.

Education

2008 - 2012

Bachelor of Engineering Degree in Electronics and Communication

Maratha Mandal Engineering College - Belagavi, Karnataka, India

2006 - 2008

Pre-university Course in Science

Govindram Seksaria Science College - Belagavi, Karnataka, India

1997 - 2006

Secondary School Leaving Certificate in Marathi

Government High School Kot - Belagavi, Karnataka, India

Certifications

AUGUST 2013 - PRESENT

FPGA Design and Development Using VHDL

Scientech Learning

Skills

Tools

Xilinx Ise, ModelSim, OrCAD, MATLAB, Proteus Design Suite, STM32CubeIDE

Languages

VHDL, Embedded C

Platforms

Windows

Other

Mathematics, Science, Biology, Physics, Chemistry, Xilinx Vivado, Tina, Digital Filters, FPGA

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