Artak Arakelyan, Developer in Yerevan, Armenia
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Artak Arakelyan

Bio

Artak has over 15 years of experience in different high-tech industries. He has strong knowledge in many areas of electronics, embedded systems, and signal processing. Artak has a proven ability to develop various hardware and software systems and looks for embedded systems projects with complex functional requirements.

Portfolio

A Semiconductor Startup in Stealth Mode
SystemC, Verilog, Embedded C++, Networks, Prototyping
Grovf
SystemVerilog, SystemC, Xilinx Vivado, FPGA, Embedded Linux, RISC-V...
Krisp
Python, TensorFlow, DSP, C++, Audio, Artificial Intelligence (AI), GCC, CMake...

Experience

  • Electronics - 20 years
  • C++ - 15 years
  • Embedded Systems - 15 years
  • C - 15 years
  • DSP - 15 years
  • Verilog - 12 years
  • FPGA - 8 years
  • Altium Designer (PCAD) - 7 years

Preferred Environment

Linux, Visual Studio Code (VS Code), Windows, Verilog, Xilinx Vivado, GCC, C, Altium Designer (PCAD), Eclipse, C++, Embedded C++, Internet of Things (IoT)

The most amazing...

...system I have built is a thermal camera with shutter-less nonuniformity correction.

Work Experience

Co-founder and Chief Architect

2025 - 2025
A Semiconductor Startup in Stealth Mode
  • Led the development of a high-throughput ASIC for AI data centers.
  • Developed the design roadmap and modeling methodologies (functional modeling, prototyping flow, etc).
  • Implemented some key functionality of the functional model and solved high-level software integration challenges with the ASIC model.
Technologies: SystemC, Verilog, Embedded C++, Networks, Prototyping

Staff R&D Engineer

2022 - 2025
Grovf
  • Developed an RSC-V powered server prototype on Siemens proFPGA prototyping platform. It boots Linux and has PCIE, NVMe, and ethernet connectivity.
  • Developed an FPGA prototype of a multiprocessor compute accelerator using RISC-V cores.
  • Created a plugin for Spike RISC-V core simulator to model a peripheral UART module.
  • Developed host-side software to communicate with the compute accelerator prototype via PCI-E interface.
  • Profiled the Java code of the Lucene library key-value search (hash table and direct and reverse indexing), converted it to batch mode, and re-implemented it in C++ to design an FPGA accelerator for Elasticsearch.
  • Developed a text parsing engine on an FPGA in order to accelerate data parsing.
Technologies: SystemVerilog, SystemC, Xilinx Vivado, FPGA, Embedded Linux, RISC-V, Hardware Development, Embedded C, Circuit Design, Linux, C++, Firmware, Prototyping

Machine Learning Architect

2018 - 2023
Krisp
  • Developed a speech dereverberation algorithm to clean a room's echo during conferences calls.
  • Implemented Krisp's noise cancellation engine as a WebAssembly JavaScript module using Emscripten to run real-time inside Google Chrome.
  • Converted Krisp's noise cancellation neural network to use fixed-point arithmetic through OpenVino to run on Intel GNA accelerator.
  • Created a fast matrix to vector multiplication function using ARM Assembly language. It is two times faster than OpenBlas on Raspberry Pi 4.
  • Integrated the Krisp audio SDK in an Android application using Oboe audio library.
Technologies: Python, TensorFlow, DSP, C++, Audio, Artificial Intelligence (AI), GCC, CMake, Git, Image Processing, Open Source, MacOS, Audio Processing

Chief Technology Officer

2017 - 2023
Parz Logic LLC
  • Developed a shutterless thermal surveillance camera. Designed the hardware, sensor nonuniformity correction algorithms, the FPGA code, and the core parts of the soft processor firmware.
  • Designed a solar-powered battery charging system with maximum power point tracking.
  • Created radio links for medical devices with high reliability and link budget requirements. Designed the hardware and firmware.
  • Designed an ultra-low power RFID reader with a radio link for security systems. Two AA batteries power the reader.
  • Designed the hardware and firmware of a gate control remote transceiver with a Bluetooth interface for delivery services. It allows for automatic recognition of the gate and opens it while paired to a mobile phone.
  • Managed the engineering team to seamlessly integrate the mechanical, software, firmware, and hardware parts of projects.
Technologies: Embedded Systems, C, C++, Verilog, FPGA, DSP, MATLAB, Python, Electronics, STM32, ARM, MSP430, Raspberry Pi, AVR, Arduino, Assembly, Keil, Git, Embedded Software, Altium Designer (PCAD), Image Processing, Open Source, Hardware, Embedded C++, PCB Design, Hardware Development, Embedded C, Circuit Design, CAN Bus, MPLAB, Microcontrollers, Firmware, Prototyping, Internet of Things (IoT), Sensor Data, Medical Devices

CAE Senior II

2014 - 2018
Synopsys
  • Developed a test project that includes Synopsys' memory BIST IP to support the silicon memory debug flow of one of the world's major semiconductor manufacturers. The project was implemented on the Altera Cyclone V FPGA.
  • Performed on-site training for one of the world's major semiconductor manufacturers' test teams regarding using Synopsys BIST IP functionality during silicon debugging.
  • Supported the world's major semiconductor companies to integrate the Synopsys memory BIST solution in their projects.
  • Performed customer training on Synopsys memory BIST IP applications.
  • Communicated customer feedback about the memory BIST IP with the engineering teams.
Technologies: Verilog, VCS, Debugging, Embedded Software, Altera Quartus, Hardware Development, Circuit Design

Research and Development Engineer | Senior II

2012 - 2014
Synopsys
  • Optimized Synopsys 28nm USB2 PHY schematics to reduce its silicon area twice. Developed several functional blocks from scratch. The first silicon met all the specifications.
  • Performed porting of several functional blocks of Synopsys USB PHY between different technology nodes.
  • Analyzed the IO pads' ESD protection using reliability analysis and IR drop flows.
  • Reviewed the USB PHY mask layouts and provided guidelines to reduce the impact of parasitics on critical block operations.
  • Designed a special active clamp for USB interface ID pin overvoltage protection.
Technologies: Simulations, Analog, USB, Perforce, PCB Design, Hardware Development, Embedded C, Circuit Design

Post-doctoral Researcher

2011 - 2012
Higher Normal School of Lyon
  • Co-authored the following paper (www.nature.com/articles/nature10872) PhysicsWorld recognizes it as one of the 2012 breakthroughs. physicsworld.com/a/physics-world-reveals-its-top-10-breakthroughs-for-2012-2/.
  • Created various experimental setups for optical trapping and tweezing.
  • Developed a fast algorithm to measure particle position in video with subpixel resolution at 2000 fps.
  • Designed a laser beam power stabilization system using an acoustic-optical modulator for diffracted beam intensity control.
  • Created an algorithm to recognize thousands of moving silica particles in a microscope image and compute their density distribution based on statistics collected from video capture.
Technologies: Physics, Research, Computer Vision, Image Processing, Open Source, Hardware, Embedded C, Circuit Design, Sensor Data

Experience

Shutterless Thermal Imaging Camera

A thermal imaging camera that performs microbolometer sensor nonuniformity correction without using a shutter.

It outputs video in CVBS and SDI formats and has an FPGA-based processing system. It contains a digital image processing pipeline based on Verilog HDL and some embedded processing firmware running on a soft processor.

A Solar-powered Battery Charging System with Maximum Power Point Tracking

The charging system's maximal power is 100 watts. Charges a 20Ah LiFePo4 12V battery to power an outdoor smart device.

The system also provides battery management, soft start, and coulomb counting. The charging system consists of two PCBs, one of which is always on and utilizes ultra-low power design approaches to avoid battery drain.

Ultra Low Power RFID Reader with A Radio Link for Security Systems

An ultra-low-power 13.56MHz RFID reader with a radio link for security systems. It is battery-powered and uses a tricky approach to detect the RFID card without draining the battery.

It generates short transmission bursts and measures the antenna coil impedance during bursts. An adaptive algorithm and a unique circuit for impedance measurement allow reliable detection of antenna impedance changes due to RFID card proximity.

The average power consumption is only about 25uA from two AA batteries.

Education

2000 - 2009

PhD Degree in Physics

Yerevan State University - Yerevan, Armenia

Skills

Libraries/APIs

TensorFlow, SystemC

Tools

LTspice, GCC, Keil, Git, Perforce, Altium Designer (PCAD), PyCharm, MATLAB, CMake, Altera Quartus

Languages

C, Verilog, Python, C++, Assembly, Embedded C++, Embedded C, SystemVerilog

Platforms

Arduino, Linux, Windows, STM32, Raspberry Pi, AVR, Eclipse, MacOS, Visual Studio Code (VS Code), Embedded Linux

Paradigms

RISC-V, Analog Circuits

Other

Embedded Systems, Hardware, PCB Design, Hardware Development, Circuit Design, Microcontrollers, Firmware, Prototyping, Sensor Data, Xilinx Vivado, ARM, MSP430, Debugging, FPGA, DSP, Electronics, Simulations, Analog, USB, Physics, Research, Embedded Software, Battery Management Systems, Image Processing, Open Source, Audio Processing, CAN Bus, MPLAB, Internet of Things (IoT), Medical Devices, FreeRTOS, Audio, VCS, Artificial Intelligence (AI), Computer Vision, RFID, Networks

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