
Brad Zwernemann
Verified Expert in Engineering
Software Developer
Austin, United States
Toptal member since August 13, 2026
Brad has spent 20+ years driving the strategy and execution of embedded audio solutions across consumer electronics and semiconductors. Combining strategic product ownership with hands-on technical leadership, he specializes in DSP firmware, hardware-software co-design, Edge AI, ML automation, and solving physical constraints through software. At Cirrus Logic, Brad pioneered the end-to-end delivery of an audio system combining on-chip multi-band DRC with ML-driven calibration for laptops.
Portfolio
Experience
- Firmware - 20 years
- Audio - 20 years
- Real-time Systems - 20 years
- Embedded C++ - 20 years
- Digital Signal Processing - 20 years
- Hardware/Software Co-design - 15 years
- Management - 12 years
- Machine Learning - 2 years
Preferred Environment
Embedded C++, MATLAB, Python, Audio
The most amazing...
...product I've delivered recently is a laptop audio system combining on-chip multi-band DRC with ML-driven calibration, featured at Computex 2024/25 and patented.
Work Experience
DSP Firmware Manager
Cirrus Logic
- Spearheaded a team of signal processing engineers delivering embedded DSP solutions for smart codecs and audio amplifiers across mobile, headset, and PC markets.
- Oversaw algorithm development, firmware implementation, and verification for speaker protection, audio enhancement, active noise control (ANC), and transducer control, as well as defining DSP hardware architecture requirements for accelerators.
- Served as feature owner and technical lead for PC laptop mechanical rattle mitigation, bringing to market a content-dependent multi-band dynamic limiter executed in real-time on smart audio amplifiers controlling rattle-inducing resonant frequencies.
- Designed automated tuning powered by machine learning classification, enabling performance across diverse acoustic designs and system architectures.
- Negotiated on-site ODM data collection and integration of pre-production characterization and test for system-level optimization.
- Served as software owner for smart audio and haptic amplifiers in mobile and PC segments, accountable for strategy, definition, budget, quality, execution, and cross-functional coordination of firmware, tuning tools, host software, and system test.
- Drove the coordination of cross-regional software teams in the UK, Australia, Arizona, and Texas to integrate hearing augmentation and noise suppression with ANC under a unified framework on proprietary DSP cores.
- Championed continuous improvement initiatives by merging hardware and software development environments with early phase co-verification, streamlined DevOps support, and structured product development transitions from concept through sustaining.
Director of DSP Software
Knowles (Formerly Audience Inc.)
- Directed a multisite organization of DSP software engineers overseeing the implementation and productization of signal processing algorithms serving the IoT, hearables, and mobile markets.
- Managed a geographically dispersed team with locations in California, Colorado, India, and Taiwan.
- Delivered voice wake and noise suppression solutions utilizing machine learning, multi-mic beam forming, binaural human hearing-based frequency domain analysis, as well as audio enhancement and echo suppression.
- Supported a wide variety of DSP platforms, including Audience/Knowles proprietary Delta Core developed with Cadence Xtensa Tensilica Instruction Extension (TIE), ARM Cortex, Tensilica HiFi, Qualcomm QDSP, x86, Teak, and CSR Kalimba.
- Guided process improvement through the adoption of Agile methods, continuous integration, and the use of tools such as Jira, Swarm, Jenkins, Perforce, and Confluence to ensure continual verification and well-defined product increments.
- Served as a member of the product steering committee, ensuring technical and resourcing feasibility as well as market viability of products through their lifecycle.
Staff DSP Software Engineer and Technical Lead
Audience Inc. (Aquired by Knowles)
- Served as the technical lead of the software architecture and infrastructure group, coordinating software development across products and locations.
- Standardized release procedures, test infrastructure, and cross-product code integration.
- Organized boot camps to train team members in all aspects of software development.
- Worked closely with DSP architecture and algorithm teams, adapting reference models for our target instruction set and to operate within the constraints of limited precision.
- Participated in the development of SIMD DSP architecture based on a proprietary numerical representation.
- Developed DSP software for multiple microphone noise suppression systems for cellular telephony.
- Implemented algorithms such as noise suppression, acoustic echo suppression, and compression on proprietary fixed- and floating-point DSPs in C, C++, and assembly language.
Senior DSP and Software Engineer
Freescale Semiconductor
- Hand-optimized critical signal processing kernels and libraries, including single/double-precision FFT/IFFT, 8x8 DCT/IDCT, and ITU-T G.723, G.729, G.168 ECAN in assembly language for StarCore VLIW and SIMD multi-core architectures.
- Conducted architectural analysis within the DSP Core Technology Center, collaborating directly with compiler engineers to optimize intermediate code generation, instruction pipeline scheduling, and register allocation against hardware constraints.
- Analyzed and resolved throughput and latency bottlenecks tied to dataflow scheduling, memory hierarchies, and cache alignment across high-channel-density real-time voice and signal processing platforms.
- Invented and patented a dynamic processor resource-allocation and reduction methodology for multichannel VoIP (US 7639671) that optimized analysis path module execution versus quality metrics, improving determinism and channel density.
- Performed systematic execution-metric profiling, standard EEMBC benchmarking, and ITU-T objective and subjective testing to correlate models with real-time target hardware performance.
Experience
On-chip DRC and ML-automated Audio Calibration for Laptop Manufacturing
I built a factory edge pipeline using specialized acoustic sensors, capturing training and diagnostic data amidst intense factory noise. I directed an architecture predicting optimal acoustic tuning maps, eliminating manual per-SKU calibration. I also spearheaded the automation of production line testing to replace subjective human listening tests.
The solution was publicly showcased at Computex and highlighted in major tech press releases. I dropped per-SKU acoustic tuning time from days to hours, cutting development time from 15% to under 3%. I also slashed production testing cycles from over 30 seconds down to just 10 seconds.
Education
Postgraduate Program Certificates in Machine Learning, Agentic, and Generative AI for Business Applications
University of Texas at Austin, McCombs School of Business - Austin, TX, USA
Master's Degree in Electrical Engineering
Georgia Institute of Technology - Online
Bachelor's Degree in Electrical Engineering
University of Texas at Austin - Austin, TX, USA
Skills
Tools
Jira, Perforce, Confluence, MATLAB, Jenkins, Git
Languages
C, Assembly, C++, Embedded C++, Python
Paradigms
Agile, Real-time Systems, Testing, DevOps, Management, Automated Testing
Storage
Data Pipelines
Other
DSP, Firmware, Digital Signal Processing, Optimization, SIMD, Hardware/Software Co-design, Machine Learning, Audio, Software, Integration, Training, Documentation, Algorithms, Voice, Fixed-Point Toolbox, Telephony, Audio Processing, Speech Recognition, Haptics, Benchmarking, Computer Architecture, Microcontrollers, Artificial Intelligence (AI), Agentic AI, Program Management, Voice Recognition, Neural Networks, Deep Neural Networks (DNNs), Beamforming, Build Releases, Acoustical Engineering, Calibration, Edge AI, Statistical Modeling, Sensor Data, Engineering Management, HAL
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