Damian Fedoryka
Verified Expert in Engineering
FPGA Developer
Washington, DC, United States
Toptal member since August 14, 2025
Damian is an FPGA engineer with 22+ years of experience in RTL design, verification, and system integration across AMD, Intel, and Microchip platforms. Skilled in Verilog, VHDL, high-speed interfaces, SoC design, and embedded systems, he has a strong background in aerospace, defense, and medical applications. With a master's degree in electrical engineering and multiple FPGA certifications, Damian is well-versed in simulation, DSP, partial reconfiguration, and technical leadership.
Portfolio
Experience
- Linux - 20 years
- VHDL - 20 years
- ModelSim - 20 years
- FPGA - 20 years
- Xilinx Vivado - 12 years
- Intel Quartus Prime - 10 years
- Libero IDE - 10 years
- Verilog - 8 years
Preferred Environment
Windows, Linux, ModelSim, Xilinx Vivado, Intel Quartus Prime, Libero IDE, Questa Sim, Altium Designer (PCAD), Git, Microsoft Office
The most amazing...
...solution I've developed is an automatic FPGA-based RF jammer canceller, which I worked on from conception to working prototype, achieving 41 dB of attenuation.
Work Experience
FPGA Development Engineer
Performance Software
- Developed and verified RTL for space and flight systems using Verilog/SystemVerilog.
- Designed a data transfer logic capable of achieving data transfer speeds of 10 Gbps using on-chip high-speed Serializer/Deserializer (SerDes) technology.
- Created interface logic for ADCs, MRAMs, and radiation-hardened Ethernet PHYs.
- Led development efforts and mentored a junior FPGA engineer.
- Integrated a secure digital card IP core into an Intel-based FPGA system for expanded storage.
FPGA Development Engineer
Correct Designs, Inc.
- Served as FPGA developer for the Mars Sample Return helicopter in Verilog/System Verilog.
- Developed features for the Mars Sample Return lander unit, optimizing area utilization.
- Led milestone reviews for the Mars Sample Return FPGA team.
- Performed lint, CDC, and RDC for the lander unit codebase.
- Collaborated closely with the FPGA verification engineer to formally verify the new logic.
Senior FPGA Engineer
Xcellastream, Inc.
- Served as lead engineer for Intel FPGA-based PCIe video transcoder for edge VDI solutions.
- Maintained and extended the existing SystemVerilog codebase using the Intel Quartus tool suite.
- Helped maintain the VDI infrastructure, including servers, lab resources, and test equipment.
Principal Research Scientist
Battelle Memorial Institute
- Led the FPGA team developing a blood analysis medical device, integrating Intel Cyclone FPGA, Nios II processor, DDR, and Ethernet.
- Developed and delivered an FPGA-based wideband RF interference canceller (1.6 GHz bandwidth) on Xilinx RFSoC, achieving 41 dB interferer attenuation in live tests.
- Authored an IRAD proposal on FPGA run-time reconfiguration for neural architecture search acceleration.
Experience
SHA-256 Implementation in FPGA
https://archive.alvb.in/svn/VHDL/SHA256/reference/IS-2_report.pdfEducation
Master's Degree in Electrical Engineering
George Mason University - Fairfax, VA, USA
Certifications
Allegro PCB Editor Basic Techniques
Cadence Systems
High Level Synthesis Using AutoESL
Bottom Line Technologies
Advanced FPGA Implementation
Xilinx Corporation
Essentials of FPGA Design
Xilinx Corporation
Skills
Tools
ModelSim, Libero IDE, Altium Designer (PCAD), Git, PCB Layout, PetaLinux
Languages
VHDL, Verilog, C, SystemVerilog
Platforms
Linux, Windows
Paradigms
Radio Frequency (RF) Protocol
Other
Xilinx Vivado, Intel Quartus Prime, Microsoft Office, FPGA, Questa Sim, Cryptography, Shell scripting, Electrical Engineering, RTL, Serializer/Deserializer (SerDes), Integration, PCI Express, Video Transcoding, DSP
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